| PART |
Description |
Maker |
| 74ALVC162835A 74ALVC162835ADGG |
74ALVC162835A; 18-bit registered driver with 30 Ohm termination resistors (3-State)
18-bit registered driver with 30W
18-bit registered driver with 30ohm termination resistors (3-State)
BUFFER/DRIVER|SINGLE|18-BIT|AVC/ALVC-CMOS|TSSOP|56PIN|PLASTIC 缓冲驱动器|单|18位|AVC/ALVC-CMOS|TSSOP|56引脚|塑料
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| 74AVCM162835 |
18-bit registered driver with 15Ω termination resistors (3-State)(15Ω终端电阻18位寄存驱动器（三态）)
18-bit registered driver with 15惟 termination resistors (3-State)(甯?5惟缁???甸???8浣??瀛?┍?ㄥ?锛?????)
|
NXP Semiconductors N.V.
|
| SSTL16877 SSTL16877DGG |
14-bit SSTL_2 registered driver with differential clock inputs
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
| SSTL16857 SSTL16857DGG |
14-bit SSTL_2 registered driver with differential clock inputs
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
| IDT74FCT162501CT IDT74FCT162501AT IDT74FCT162501CT |
18-Bit Registered Transciever
FAST CMOS 18-BIT REGISTERED TRANSCEIVER
|
IDT
|
| SSTL16877DGG/G |
SSTL16877; 14-bit SSTL_2 registered driver with differential clock inputs
|
Philips
|
| ASM4SSTVF32852 ASM4SSTVF32852-114BT ASM4ISSTVF3285 |
DDR 24-Bit to 48-Bit Registered Buffer
SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA114
Specialty Clock Management
2.3 V -2.7 V, DDR 24-bit to 48-bit registered buffer
|
Alliance Semiconductor ...
ALSC[Alliance Semiconductor Corporation]
|
| FB2031BB CD3206BB |
9-bit latched/registered/pass-thru Futurebus transceiver FB SERIES, 9-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PQFP52
|
NXP Semiconductors N.V.
|
| GS8161E32D-166 GS8161E32D-166I GS8161E3T-200 GS816 |
14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TVSOP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器
1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×18512k×32512k×36 18M位同步突发静态存储器
20-Bit SSTL_3 Interface Buffer With 3-State Outputs 64-TSSOP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器
25-Bit Configurable Registered Buffer With Address-Parity Test 96-LFBGA 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器
1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×1812k×3212k×36 18M位同步突发静态存储器
Quad 2-input Exclusive-OR gates 14-PDIP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器
25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器
20-Bit SSTL_3 Interface Universal Bus Driver With 3-State Outputs 64-TSSOP 0 to 70
Quad 2-input Exclusive-OR gates 14-SOIC 0 to 70
13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70
|
http://
GSI Technology
Electronic Theatre Controls, Inc.
|
| M393T6553CZA-CE7 M393T2950CZ3-CCC M393T2950CZ3-CD5 |
DDR2 Registered SDRAM MODULE 240pin Registered Module based on 512Mb C-die 72-bit ECC
|
SAMSUNG[Samsung semiconductor]
|
| M312L5128MT0 M312L5128MT0-CA0 M312L5128MT0-CA2 M31 |
DDR SDRAM Registered Module ( TSOP-II ) 184pin Registered Module based on 1Gb M-die with 1,200mil Height & 72-bit ECC
|
SAMSUNG SEMICONDUCTOR CO. LTD.
|
| BS62LV8005 BS62LV8005BC BS62LV8005BI BS62LV8005EC |
DDR-II, 25-Bit 1:1 or 14-Bit 1:2 Configurable Registered Buffer
Very Low Power/Voltage CMOS SRAM 1M X 8 bit
|
BRILLIANCE SEMICONDUCTOR, INC.
BSI[Brilliance Semiconductor]
|
